This Getting Started Guide will explain how to get started with developing for the free and open RISC-V ISA, both in simulation and on physical implementations.
It will be expanded with time to cover more platforms and scenarios.
RISC-V (pronounced “risk-five”) is an open, free ISA enabling a new era of processor innovation through open standard collaboration. It’s both academia- and industry friendly, open to scrutiny, built from scratch with security and modern use cases in mind. The standard is driven by a Foundation with more than 130 members, including Google, Western Digital, NVIDIA, NXP and many other industry leaders.
For details about the ISA and the Foundation, see the RISC-V website.